Identification method of integrated circuit

ApplicationNo. CN03 1 15242.2 Patent application date 2003.0 1.29 Publication (announcement)No. CN 152 1622 Publication (announcement) date 2004.08./kloc-0 Shanghai Jiao Tong University; Tongji University Address 200233 Inventor (Designer) Lin, Floor 16, Zhonghuamen Building, No.520 Yishan Road, Shanghai; Lin Tao; Rongmengtian; Chen Yan; ; Wang, an agent of Shanghai Patent and Trademark Office, is a patent agency in China at the filing date of Wang Haixiong's international application. The invention relates to an integrated circuit layout recognition method, which is realized by computer software control. Comprises the following steps: inputting the original information of a layout into a computer and editing the original information; Disk file 1 stores compilation results; Receive the compilation result information stored in the disk file 1 and draw a color layout; Extracting circuit elements and circuit interconnection tables from the compilation result information stored in the disk file 1; The disk file 2 stores the extracted circuit element information and the circuit interconnection table; The information of the extracted circuit elements and the circuit interconnection table stored in the disk file 2 is output as a table of the circuit schematic diagram; By extracting the circuit element information and circuit interconnection table stored in the above disk file 2, the circuit schematic diagram is drawn and the intuitive circuit schematic diagram is output. The invention has strong universality, simplicity and intuition, reasonable data structure, strong practicability, simple use and easy popularization and use. Sovereignty term 1, a method for identifying the layout of an integrated circuit, is controlled by a computer software system, and is characterized in that the method for identifying the layout of an integrated circuit includes the following steps: S 1: inputting the original information of the layout into a computer, wherein the original information of the integrated circuit layout is the source program of the layout, and it is a series of programs placed on a floppy disk or a magnetic tape, which describes the overall situation of the integrated circuit layout, which is exactly what is needed. S2, using MASK 1 technology to compile the original information of the integrated circuit layout; S3, the disk file 1 storing the intermediate result is the result of compiling the mask 1; S4: MASK 2 technology, which accepts the compilation result information stored in the disk file 1, so as to draw the integrated circuit layout, that is, draw the color layout according to the original plate-making data for analysis; S5: MASK 3 technology, which extracts circuit elements and circuit interconnection tables from the compilation result information stored in the disk file 1 through graphic operation; S6, a disk file 2 storing the intermediate result, wherein the disk file 2 stores the extracted circuit element information and the circuit interconnection table; S7: MASK 4 technology, which outputs a table about the circuit schematic diagram from the information of the extracted circuit elements and the circuit interconnection table stored in the disk file 2; Step S8: MASK 5 technology, according to the extracted circuit element information and the circuit interconnection table stored in the disk file 2, draw the circuit schematic diagram and output the intuitive circuit schematic diagram.