30 stitches on the back and 30 stitches on the front.
The following are some common memory parameters:
Bit bit is the smallest unit in memory, also called "bit". It has only two states, denoted by 0 and 1 respectively.
Bytes, eight consecutive bits are called a byte.
nanosecond
A nanosecond is one hundredth of a second. The unit of memory reading and writing speed, the smaller the number before it means the faster the speed.
Before 72pin and after 72pin
72pin memory can be said to be a classic in the history of computer development, and it is precisely because of its cheapness and rapid increase that it provides a solid foundation for the popularization of computers. Because more people use it, it is still available in the market at present.
SIMM (Single Line In-line Memory Module)
Single contact memory module. It is a common memory interface method in 5X86 and its early PC. Before 486, 30-pin SIMM interface was mostly used, and 72-pin SIMM interface was mostly used in Pentuim, or coexisted with DIMM interface types. People usually refer to the 72-line SIMM memory module as 72-line memory directly.
error correcting code
Error checking and correcting. Similar to parity, it can not only detect errors, but also correct most of them. It is also achieved by adding bits to the original data bits, and these extra bits are used to reconstruct the wrong data. Only after memory error correction can computer operation instructions continue to be executed. Of course, the performance of the system is obviously degraded in error correction.
Extended data output memory
Extended data output memory. This is Meguiar's patented technology. There are 72 lines and 168 lines, 5V voltage, 32bit bandwidth, and the basic speed is above 40ns. Traditional DRAM and FPM DRAM must output row address and column address when accessing each bit of data, and it will be stable for a period of time before they can read and write valid data, while the address of the next bit must wait for the completion of this reading and writing operation before it can be output. EDO DRAM can output the next address at any time as long as the specified effective time arrives, thus shortening the access time and improving the efficiency by 20%-30% compared with FPM DRAM. It has a high cost performance, because its access speed is faster than FPM DRAM 15%, and the price is only 5% higher. Therefore, it has become the standard memory of low-end Pentium motherboards.
DIMM (Dual In-line Memory Module)
Double-sided contact memory module. That is to say, there are data interface contacts on both sides of the plug-in board of this kind of interface memory. This type of interface memory is widely used in modern computers, usually 84 pins. Because it is bilateral, * * * has 84×2= 168 lines, so people often call this kind of memory 168 lines.
PC 133
Synchronous burst RAM
Synchronous burst memory. It is a 168 line with a voltage of 3.3V, a bandwidth of 64bit and a speed of 6ns. It is a dual bank structure, that is, there are two memory arrays, one of which is ready to read when the CPU reads data, and the two automatically switch each other, which doubles the access efficiency. And the RAM and CPU are controlled at the same clock frequency, so that the external frequencies of the RAM and CPU are synchronized, and the waiting time is cancelled, so the transmission rate is faster than that of the EDO DRAM 13%. SDRAM adopts bank storage structure and burst mode, which can transmit a whole piece of data instead of a piece of data.
SDRAM ECC server dedicated memory
Rambus DRAM
It is a kind of memory developed by American RAMBUS Company on the basis of RAMBUSCHANNEL technology. The word length for data storage is 16 bits, and the extremely fast transmission rate is expected to reach 600MHz. The pipeline storage structure supports interleaving and executes four instructions at the same time. From the packaging form alone, it is no different from DRAM, but from the heat value point of view, it is roughly equivalent to 100MHz SDRAM. Because its graphics acceleration performance is 3- 10 times that of EDO DRAM, it is mainly used as display memory on high-end graphics cards at present.
Direct RDRAM
It is an extension of RDRAM and uses the same RSL, but the interface width reaches 16 bits and the frequency reaches 800MHz, which is more efficient. The single transmission rate can reach 1.6GB/s, and the twice transmission rate can reach 3.2 GB/s.
Comments:
30-pin and 72-pin memory have long been out of the market. Now the mainstream memory on the market is SDRAM, and the price of SDRAM has fallen to the bottom. For businesses and manufacturers, the profit margin has shrunk to the limit. Who wants to do business at a loss? Besides, it's unnecessary. After all, manufacturers or businesses are always developing in the direction of "money".
With the rapid development of CPU production of INTEL and AMD and the support of major board manufacturers, RAMBUS and DDRAM have also been developed and popularized faster. Which one will become the mainstream and which one is more suitable for users, the market will eventually prove all this.
Machine access memory is the storage component of computer, and it is also considered as a component reflecting the technical level of integrated circuits. Among all kinds of memories, dynamic memory (DRAM) has the largest storage capacity and the most extensive application. In the past decades, its storage capacity has expanded thousands of times and the speed of accessing data has increased by more than 40 times. The improvement of memory integration is achieved by continuously reducing the device size. The shrinking size puts forward extremely strict requirements for the design and manufacturing technology of integrated circuits. It can be said that only a new generation of new technologies has a generation of integrated circuits.
DRAM (Dynamic Random Access Memory (DRAM)) uses the charge on the capacitor allocated by MOS memory cells to store data bits. Because the capacitance charge will leak, DRAM needs to be refreshed regularly in order to keep the information from being lost. Because the memory cell with this structure needs fewer MOS transistors, DRAM has high integration, low power consumption and the lowest price per bit. DRAM is generally used in large-capacity systems. There are two development directions of DRAM, one is high integration, large capacity and low cost, and the other is high speed and specialization.
Since Intel introduced the first 1970 DRAM chip, its storage capacity has basically quadrupled every three years. 1 99565438+In February, South Korea's Samsung Company took the lead in announcing the adoption of the 0. 1.6 micron process, and successfully developed the 1000M-bit high-speed (3lns) synchronous DRAM with integration over1billion. The competition in this field is very fierce. In order to solve the problem of huge investment and market risk, major semiconductor manufacturers in the world have joined hands to form a number of cooperative development groups.
1996, the main products on the market are 4M-bit DRAM chips and 16M-bit DRAM chips; 1997 was dominated by 16M-bit DRAM chips, and 1998 saw a large number of 64M-bit DRAM chips on the market. The market share of 64M DRAM is 52%; The market share of 16M DRAM is 45%. The market share of 6438+0999 64M DRAM increased to 78%, and 16M DRAM accounted for 1%. 128M DRAM has been popularized, and 256M DRAM will appear next year.
The clock of high performance RISC microprocessor has reached 100 MHz ~ 700 MHz. In this case, the processor needs more and more memory bandwidth. In order to meet the needs of high-speed CPU to form a high-performance system, DRAM technology continues to develop. Driven by the market demand, a series of high-speed DRAM with new structures appeared. E.g. EDRAM, CDRAM, SDRAM, RDRAM, SLDRAM, DDR DRAM, DR DRAM, etc. In order to improve the access speed of dynamic read-write memory, DRAM implemented by different technologies includes:
(1) Fast Page Mode FPM DRAM
FPM (Fast Page Mode) DRAM has become a standard form. Generally speaking, the reading and writing of DRAM memory cells is to select the row address first, and then the column address. In fact, in most cases, the next needed data is in the next cell of the currently read data, that is, its address is in the next column of the same row. FPM DRAM can select different column addresses by keeping the same row address to realize continuous memory access. The delay time of establishing row address is reduced, and the speed of continuous data access is improved. But when the clock frequency is higher than 33MHz, the read data will be unreliable because there is not enough charging and holding time.
(2) Extended data output dynamic read-write memory EDO DRAM
EDODRAM(Extended Data Out DRAM) is a secondary memory output buffer unit developed on the basis of FPM technology, which consists of a set of latches at the output end of RAM, and is used to store data and keep it until the data is reliably read, thus prolonging the effective time of data output. EDODRAM can work stably at 50MHz clock.
Because the performance of dynamic read-write memory can be effectively improved by integrating the EDO logic circuit with little cost increase on the basis of the original DRAM, EDO DRAM has become the mainstream technology and basic form of dynamic read-write memory design before this.
(3) EDO DRAM in burst mode
Based on the EDO DRAM memory, a dynamic read-write memory burst mode, EDO DRAM(Burst EDO DRAM), which can provide higher effective bandwidth is developed. This kind of memory can predict the four data addresses that may be needed, and automatically perform preforming, so that the frequency that can work stably can be increased to 66MHz.
(4) synchronous dynamic read-write memory SDRAM
SDRAM(Synchronous DRAM) is to improve the performance of the memory by synchronously controlling the operation of the clock on the interface and arranging the on-chip staggered burst address generator. It only needs a header address to access a memory block. All input samples, if the output is valid, are on the rising edge of the same system clock. The clock frequency synchronized with CPU can be as high as 66 MHz ~ 100 MHz. Compared with ordinary DRAM, it adds a programmable register. Using SDRAM can greatly improve the speed and performance of memory chips, and system designers can flexibly adopt staggered or sequential pulses according to the requirements of processors.
Infineon Technology (formerly Siemens Semiconductor) has supplied 256Mit SDRAM in batches this year. Its SDRAM is produced by 0.2μm process, and the output time is 100 ns at the clock frequency of 100MHz.
(5) CDRAM with cache.
CDRAM (Cache DRAM) is a proprietary technology developed by mitsubishi electric Corporation. The sample is presented in 1992. By integrating a certain number of high-speed SRAM in DRAM chip as cache and synchronization control interface, the performance of memory is improved. The chip adopts +3.3V single power supply and low voltage TTL input and output levels. At present, the CDRAM provided by Mitsubishi Corporation is 4Mb and 16Mb, and the on-chip cache is 16KB. With 128-bit internal bus, the data access of 100MHz can be realized. The pipeline access time is 7ns.
(6) Enhanced Dynamic Read-Write Memory EDRAM (Enhanced DRAM)
Ramtron's DRAM product with cache is called Enhanced Dynamic Read-Write Memory (e DRAM), which adopts asynchronous working mode, single +5V power supply, CMOS or TTL input and output levels. By adopting the improved DRAM 0.76μm CMOS process and structural technology which can reduce parasitic capacitance and improve transistor gain, its performance is greatly improved, with the row access time of 35ns, the read-write access time of 65ns and the page write cycle time of 15ns. EDRAM also integrates a static RAM cache with 2kbit 15ns, a write-after register and another control line on the column decoder of the on-chip DRAM storage matrix, and allows SRAM cache and DRAM to work independently. You can cache one row of data at a time. It can operate any memory cell in the way of page or static column access like standard DRAM, and the access time is only 15ns. When the cache misses, EDRAM loads a new line into the cache and outputs the selected memory cell data, which takes 35ns. The burst data rate of the memory can reach 267 megabytes per second.
(7) RDRAM(Rambus DRAM)
Rambus DRAM is a new type of dynamic read-write memory, which uses a unique interface technology developed by Rambus Company to replace the page structure. The interface uses a special 9-bit low-voltage load transmission line between the processor and DRAM, and works with a 250MHz synchronous clock. It is a serial bus interface with byte width address and data multiplexing. This interface, also called Rambus channel, is embedded in DRAM to form Rambus DRAM, and can also be embedded in user-customized logic chips or microprocessors. Using two edges of 250MHz clock, the burst data transmission rate can reach 500MHz. In the system using Rambus channel, each chip has its own controller, which is used to handle address decoding and page cache management. Therefore, the capacity of a memory subsystem can reach 512kbytes, and it includes a bus controller. Memories with different capacities have the same pins and are connected to the same set of buses. Rambus developed this new type of DRAM, but it didn't produce it by itself, but transferred the technology by issuing a license. Semiconductor companies that have obtained production licenses include NEC, Fujitsu, Toshiba, Hitachi and LG.
There are three new types of DRAM in the next generation: double data rate synchronous dynamic read-write memory (DDR SDRAM), synchronous chain dynamic read-write memory (SLDRAM) and Rambus interface DRAM(RDRAM).
(1) DDR DRAM (Double Data Rate DRAM)
On the basis of synchronous dynamic read-write memory SDRAM, data strobe signal is provided by using delay locked loop technology to accurately locate data, and data can be transmitted at both the rising edge and the falling edge of clock pulse (instead of the first generation SDRAM only transmitting data at the falling edge of clock pulse), thus the data transmission rate is doubled without increasing the clock frequency, so it is called double data transmission rate (DDR)DRAM, which is actually the second generation SDRAM. Because DDR DRAM needs a new high-speed clock synchronization circuit and a memory module that meets JEDEC standards, the motherboard and chipset are expensive, and can only be used in high-end servers and workstations, which may be unacceptable on low-end PCs.
(2) Synchronous linked memory
This is an open standard jointly formulated by IBM, HP, Apple, NEC, Fujitsu, Hyundai, Micron, TI, Toshiba, Sansung and Siemens, and entrusted by Mosaid Technologies. Therefore, SLDRAM is the most promising dynamic read-write memory to become the open industrial standard of high-speed DRAM. It is a high-speed dynamic read-write memory developed on the basis of the original DDR DRAM. It has the same high data transmission rate as DRDRAM, but lower than its working frequency; In addition, the production of this kind of memory does not need to pay patent fees, which makes the manufacturing cost lower, so this kind of memory should be competitive in the market. However, because SLDRAM alliance is a loose consortium, it is difficult for many members to coordinate their investment in scientific research funds, and Intel does not support this standard, so it is difficult to form a climate for this kind of dynamic memory, which is not as good as DRDRAM of Rambus supported by Intel. SLDRAM can be used in communication and consumer electronics products, high-end PCs and servers.
(3) DRDRAM (Direct Rambus DRAM)
Since 1996, Rambus company has formulated a new generation of RDRAM standard with the support of Intel company, which is DRDRAM(Direct RDRAM). This is a protocol-based DRAM. Unlike traditional DRAM, its pin definition will change with the command. The same set of pin lines can be defined as address lines or control lines. Its pin count is only one-third of that of ordinary DRAM. When the chip capacity needs to be expanded, only the command needs to be changed, and no hardware pins need to be added. This chip can support an external frequency of 400MHz, and then use the rising edge and falling edge to transmit data twice, which can make the data transmission rate reach 800MHz. At the same time, by expanding the data output channel from 8 bits to 16 bits, the maximum data output rate can reach 1.6Gb/s at 100MHz. Toshiba first introduced 72Mb RDRAM, 1998 in September after purchasing the patent of Rambus's high-speed transmission interface technology, of which 64Mb was used for data storage and 8Mb was used for error correction and verification, which greatly improved the reliability of data reading and writing.
Intel held a public discussion and strongly recommended DRDRAM as the standard for the next generation of high-speed memory. At present, Intel has invested in the production line and test line of DRDRAM established by companies such as Micro, Toshiba and Samsung. Many other manufacturers are also struggling. Recently, AMD announced that at least K7 microprocessors launched this year do not intend to use Rambus DRAM. It is said that IBM is considering giving up its support for Rambus. At present, the market is also 64Mb DRAM, and RDRAM is 45 dollars more expensive than other standards.
It can be seen that the development trend of memory is: large capacity, high speed, multi-variety, multi-function, low voltage and low power consumption.
The technology development of memory has the following trends: CHMOS technology replaces NMOS technology to reduce power consumption; Reduce the device size, and the peripheral circuit still adopts ECL structure to improve the access speed and integration; The storage capacitor is changed from plane HI-C to deep trench, which ensures the charge storage capacity after size reduction and improves reliability. In circuit design, simplify the peripheral circuit structure, pay attention to reducing noise, and use redundant technology to improve quality and yield; A variety of new technologies are adopted in the process; Make the storage capacity of DRAM rise steadily, and lay a foundation for developing new large-capacity circuits in the future.
From the processors and memories in electronic computers, we can see the progress of ULSI and the great changes in recent decades.