The invention discloses a SiC MESFET using a semi-insulating SiC substrate substantially free of deep-level dopants. Using semi-insulating substrate can reduce the back gate effect in MESFETs. SiC MESFETs having a gate structure with two trenches are also provided. MESFETs with selectively doped p-type buffer layers are also provided. The utilization of this buffer layer can be reduced to one third of the output conductance of SiC MESFETs with traditional P-type buffer layer, and a power gain of 3db can be generated. It is also possible to provide a ground contact to the P-type buffer layer, which may be formed of two types of P-type layers having layers with higher doping concentration formed on the substrate. SiC MESFETs according to the embodiment of the invention can also use chromium as Schottky gate material. In addition, the oxide-nitride-oxide (ONO) passivation layer can be used to reduce the surface effect in SiCMESFETs. Similarly, the source and drain ohmic contacts can be directly formed on the N-type channel layer, so there is no need to manufacture the n+ region, and the steps related to the manufacturing can be removed from the manufacturing process. The invention also discloses a method for manufacturing the SiC mesfet, a gate structure and a passivation layer for the SiC mesfet.
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Claim 1. A metal semiconductor field effect transistor includes a semi-insulating silicon carbide substrate substantially free of deep-level dopants; N-type epitaxial layer of N-type conductive silicon carbide on the substrate; Ohmic contacts on the N-type epitaxial layer, which respectively define a source region and a drain region; And a Schottky metal contact on the N-type epitaxial layer, the Schottky metal contact being located between the ohmic contacts and thus between the source region and the drain region, so that an active channel is formed between the source region and the drain region in the N-type epitaxial layer when a bias voltage is applied to the Schottky metal contact.