Double stress lining (DSL) technology
At the end of 2004, AMD and IBM jointly announced a breakthrough in the field of transistor technology. Engineers from these two companies have developed a technology called Dual Stress Liner, which can improve the response speed of semiconductor transistors by 24%.
In fact, the principle behind this technology is quite simple. In fact, DSL is very similar to the strained silicon technology introduced by Intel in the 90nm production process. As we all know, the finer the transistor, the higher the running speed, but it will also lead to an increase in leakage current and a decrease in switching efficiency, which will lead to an increase in power consumption and heat generation. Dual-stress liner improves speed and reduces power consumption by applying stress to the silicon layer of the transistor.
In other words, DSL can change the atomic lattice between silicon, so that the transistor can get faster response time and lower heat. In one case, the silicon atoms are "pulled apart", and in another case, they are "squeezed together", which is achieved by moving them to the nitride sealing layer where the atomic lattice is stretched or compressed. Unlike the strained silicon used by Intel, the DSL of AMD and IBM can be used for NMOS and PMOS transistors (with N and P channels) without using the extremely difficult-to-obtain silicon germanium layer, which will increase the cost and may affect the chip yield.
The duality of DSL makes it more effective than Intel's strained silicon: DSL can improve the response speed of transistors by 24%, while strained silicon can provide the maximum improvement of 15-20%. More importantly, this new technology of AMD and IBM has no negative impact on output and production cost. Because there is no need to use new production methods in production, mass production can be carried out quickly with standard production equipment and materials. In addition, by using silicon insulating film structure (SOI) and strained silicon, transistors with higher performance and lower power consumption can be produced.
The core of the new Venice processor is AMD's first desktop processor with dual stress lining technology. This new technology, combined with the current SOI technology, can make the processor based on Venice reach a higher core working clock frequency. AMD engineers predict that the combination of dual stress liner and SOI will increase the frequency potential of Athlon 64 processor by about 65,438+06%. In other words, a Venice-based CPU should have a nominal frequency of 2.8GHz.