Find the design standard of mixed signal PCB?

The operation of analog circuits depends on changing current and voltage. The work of digital circuit depends on the receiver to detect the high level or low level according to the predefined voltage level or threshold, which is equivalent to judging the "true" or "false" logic state. There is a "gray" area between the high level and the low level of the digital circuit. In this respect, digital circuits sometimes show analog effects. For example, when a digital signal jumps from a low level to a high level (state), if the digital signal jumps fast enough, overshoot and ringing reflection will occur.

The article is quoted from Shenzhen Honglijie Electronics!

For modern circuit board design, the concept of mixed-signal PCB is vague, because even in pure "digital" devices, there are still analog circuits and analog effects. Therefore, in the early stage of design, in order to reliably achieve strict timing allocation, it is necessary to simulate the simulation effect. In fact, in addition to the reliability that communication products must have trouble-free continuous operation for several years, it is particularly necessary to simulate the simulation effect in mass-produced low-cost/high-performance consumer products.

Another difficulty of modern mixed-signal PCB design is that more and more devices adopt different digital logic, such as GTL, LVTTL, LVCMOS, LVDS logic and so on. The logic threshold and voltage swing of each logic circuit are different, but the circuits with different logic threshold and voltage swing must be designed on the same PCB. Here, you can master successful strategies and technologies by deeply analyzing the layout and wiring design of high-density, high-performance and mixed-signal PCB.

Fundamentals of mixed signal circuit wiring

When digital circuits and analog circuits share the same components on the same circuit board, the layout and wiring of the circuits must pay attention to methods.

In the design of mixed-signal PCB, there are special requirements for power supply wiring, which require that analog noise and digital circuit noise be isolated from each other to avoid noise coupling, so the complexity of layout and wiring increases. The special demand for power transmission lines and the requirement of isolating noise coupling between analog and digital circuits further increase the complexity of layout and wiring of mixed-signal PCB.

If the power supply of analog amplifier in A/D converter is connected with the digital power supply of A/D converter, it is likely to cause the interaction between analog circuit and digital circuit. Perhaps, due to the location of input/output connectors, the layout scheme must mix the wiring of digital and analog circuits.

Before layout and wiring, engineers should understand the basic weaknesses of layout and wiring schemes. Even if there is a wrong judgment, most engineers tend to use layout and wiring information to identify potential electrical impacts.

Layout and wiring of modern mixed-signal PCB

The layout and wiring technology of mixed-signal PCB will be described through the design of OC48 interface card. OC48 stands for optical carrier standard 48, which is basically oriented to 2.5Gb serial optical communication. It is one of the high-capacity optical communication standards in modern communication equipment. OC48 interface card contains several typical mixed-signal PCB layout and routing problems, and its layout and routing process will indicate the sequence and steps to solve the mixed-signal PCB layout scheme.

OC48 card includes an optical transceiver, which is used to realize bidirectional conversion between optical signals and analog electrical signals. Analog signals are input or output to the digital signal processor, and the DSP converts these analog signals into digital logic levels, so that they can be connected with the microprocessor, programmable gate array and system interface circuits of DSP and microprocessor on the OC48 card. Independent PLL, power filter and local reference are also integrated.

The microprocessor is a multi-power device, the main power supply is 2V, and the I/O signal power supply of 3.3V is shared by other digital devices on the board. Independent digital clock source provides clock for OC48I/O, microprocessor and system I/O. ..

After checking the layout and wiring requirements of different functional circuit blocks, it is preliminarily suggested to adopt 12 laminate. The configuration of microstrip and stripline layers can safely reduce the coupling of adjacent trace layers and improve impedance control. A grounding layer is set between the first layer and the second layer to isolate the wiring of sensitive analog reference source, CPU core and PLL filter power supply from the microprocessor and DSP devices in the first layer. Power plane and ground plane always appear in pairs, just like OC48 card makes * * * enjoy 3.3V power plane. This will reduce the impedance between the power supply and the ground, thus reducing the noise on the power supply signal.

Avoid digital clock lines and high-frequency analog signal lines near the power layer, otherwise the noise of the power signal will be coupled into sensitive analog signals.

According to the requirements of digital signal wiring, the split between power supply and analog ground plane should be carefully considered, especially at the input and output ends of mixed signal devices. Wiring through openings in adjacent signal layers will lead to impedance discontinuity and poor transmission line loops. All these will lead to signal quality, timing and EMI problems.

Sometimes adding several layers of grounding, or using several peripheral layers for the local power supply layer or grounding layer under a device, can cancel the opening and avoid the above problems, so OC48 interface card adopts multi-layer grounding. Keeping the positions of the opening layer and the wiring layer symmetrical can avoid card deformation and simplify the manufacturing process. Because 1 ounce. Copper clad laminate has a strong resistance to high current, 1 oz. 3.3V power supply layer and corresponding grounding layer shall be copper clad laminate, 0.5 oz. Copper clad laminate can be used in other layers, which can reduce the voltage fluctuation caused by transient large current or peak period.

If a complex system is designed from the ground plane, 0.093 inch and 0. 100 inch thick cards should be used to support the wiring plane and the ground isolation layer. The thickness of the card must also be adjusted according to the wiring feature size of the through-hole pad and the hole, so that the aspect ratio of the diameter of the drilled hole to the thickness of the finished card does not exceed the aspect ratio of the metallized hole provided by the manufacturer.

If you want to design low-cost and high-yield commercial products with the least number of wiring layers, you should carefully consider the wiring details of all special power supplies on mixed-signal PCB before layout or wiring. Before starting layout and wiring, the target manufacturer should review the preliminary layering scheme. Basically, delamination should be based on the thickness of the finished product, the number of layers, the weight of copper, the impedance (with tolerance) and the minimum size of via pads and holes. The manufacturer shall provide stratification suggestions in writing.

The proposal should include the configuration examples of all controlled impedance striplines and microstrip lines. Consider your impedance predictions in combination with the manufacturer's impedance, and then use these impedance predictions to verify the signal routing characteristics in the simulation tool used to develop CAD routing rules.

Layout of OC48 card

The high-speed analog signal between optical transceiver and DSP is very sensitive to external noise. Similarly, all dedicated power supply and reference voltage circuits will also produce a lot of coupling between the analog and digital power supply transmission circuits of the card. Sometimes, due to the limitation of the shell shape, it is necessary to design a high-density board. Due to the direction of the external optical cable accessing the card and the high size of some components of the optical transceiver, the position of the transceiver in the card is largely fixed. The system I/O connector position and signal distribution are also fixed. This is the basic work that must be completed before layout.

Like most successful high-density analog layout and wiring schemes, in order to meet the wiring requirements, layout and wiring requirements must be considered mutually. For an analog part of a mixed-signal PCB and a local CPU core with a working voltage of 2V, the method of "layout first and then wiring" is not recommended. For OC48 card, the analog circuit part of DSP, including analog reference voltage and analog power supply bypass capacitor, should be connected alternately first. After the wiring is completed, the whole DSP with analog components and wiring should be placed close enough to the optical transceiver to fully ensure that the wiring length of high-speed analog differential signals to DSP is the shortest, and the bends and vias are the least. Symmetry of differential layout and wiring will reduce the influence of * * * mode noise. However, it is difficult to predict the optimal layout before wiring.

For PCB layout design guidelines, please consult the chip distributor. Before designing according to the guidelines, we should fully communicate with the application engineers of the dealers. Many chip distributors have strict time limits on providing high-quality circuit boards. Sometimes, the solutions they provide are feasible for "first-class customers" who use equipment. In the field of signal integrity (SI) design, the signal integrity design of new devices is particularly important. According to the distributor's basic guidelines, combined with the specific requirements of each power supply and grounding pin in the package, we can start the layout and wiring of OC48 card integrated with DSP and microprocessor.

After the position and wiring of the high-frequency analog part are determined, the remaining digital circuits can be placed according to the grouping method shown in the block diagram. Attention should be paid to carefully designing the following circuits: the position of PLL power filter circuit in CPU with high sensitivity to analog signals; Local CPU core voltage regulator; Reference voltage circuit of "digital" microprocessor.

At this time, the electrical and manufacturing standards of digital wiring can be appropriately applied to the design. The signal integrity design of the above-mentioned high-speed digital bus and clock signal reveals some special wiring topology requirements for processor bus, balanced ts and some clock signal wiring. But you may not know that some people have put forward an updated proposal, that is, adding some termination resistors.

In the process of solving the problem, it is natural to make some adjustments in the layout stage. However, before starting wiring, it is very important to verify the timing of the digital part according to the layout scheme. At this time, a complete DFM/DFT layout inspection of the circuit board will help to ensure that the card meets the needs of customers.

Digital wiring of OC48 card

For the power line of digital equipment and the digital part of mixed-signal DSP, digital wiring should start from SMD escape mode. The shortest and widest printing line allowed by the assembly process should be adopted. For high frequency devices, the printed line of power supply is equivalent to a small inductance, which will worsen the power supply noise and cause poor coupling between analog and digital circuits. The longer the power supply printed line, the greater the inductance.

The best layout and wiring scheme can be obtained by using digital bypass capacitor. In short, the position of the bypass capacitor can be finely adjusted according to the need, so that it can be easily installed and distributed around the digital part and the digital part of the mixed signal device. The same "shortest and widest routing" method should be used to route the bypass capacitor socket diagram.

When the power supply branch passes through a continuous plane (such as the 3.3V power supply layer on the OC48 interface card), the power supply pin and the bypass capacitor do not have to enjoy the same exit diagram, so the lowest inductance and ESR bypass can be obtained. On mixed-signal PCB such as OC48 interface card, special attention should be paid to the wiring of power supply branches. Remember, the extra bypass capacitors should be placed on the whole card in the form of matrix arrangement, even close to passive devices. After the power socket diagram is determined, you can start automatic wiring. ATE test contacts on OC48 card should be defined during logic design. Make sure that ATE touches the 100% node. In order to realize the ATE test with the minimum ATE test probe of 0.070 inch, the position of the branch via must be reserved to ensure that the power plane is not cut off by the intersection of the anti-pad of the via.

If the power and ground plane separation scheme is to be adopted, the layer bias should be selected on the adjacent wiring layer parallel to the separation. According to the perimeter of the opening area, a wiring prohibition area is defined on the adjacent layer to prevent wiring from entering. If the wiring must pass through an open area to reach another layer, make sure that the other layer adjacent to the wiring is a continuous ground layer. This will reduce the reflection path. For some digital signals, it is beneficial to let the bypass capacitor pass through the open power plane, but it is not recommended to bridge between the digital and analog power planes, because noise will be coupled with each other through the bypass capacitor.

Several latest automatic routing applications can route high-density multilayer digital circuits. In the initial wiring stage, a large via spacing of 0.050 inch should be used at the SMD exit, and the package type used should be considered. In the subsequent routing stage, vias should be allowed to be close to each other, so that all tools can achieve the highest routing rate and the least number of vias. Because the OC48 processor bus adopts an improved star topology, it has the highest priority in automatic routing.

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After OC48 board is completed, signal integrity check and timing simulation should be carried out. Simulation results show that the path guidance meets the expected requirements and improves the timing index of the layer 2 bus. Finally, check the design rules, recheck the final manufacture, recheck the mask and send it to the manufacturer, then the board laying task is officially over.