What does PCI bus mean? What does busbar mean?
PCI bus
Introduction to PCI technical specifications
From the establishment of the specification in 1992 to the present, the PCI bus has become a standard bus for computers. The standard system structure composed of PCI bus is shown in Figure 1.
The PCI bus replaced the earlier ISA bus. Of course, the AGP bus specifically used for graphics cards appeared behind the PCI bus, and the current PCI Express bus, but the fact that PCI has been used from 1992 to the present shows that it has many advantages, such as plug and play (Plug and Play). , interrupt *** sharing, etc. Here we give an in-depth introduction to the PCI bus.
In terms of data width, PCI buses are divided into 32bit and 64bit; in terms of bus speed, there are two types: 33MHz and 66MHz. Currently popular is 32bit @ 33MHz, and 64bit systems are becoming popular. The improved PCI system, PCI-X, can reach up to 64bit @ 133MHz, so that a data transfer rate of more than 1GB/s can be obtained. If there are no special instructions, the following discussion takes 32bit @ 33MHz as an example.
1. Basic concepts
Unlike the ISA bus, the address bus and data bus of the PCI bus are time-shared and multiplexed. The advantage of this is that on the one hand, it can save the number of pins for external plug-ins, and on the other hand, it facilitates burst data transmission. When transferring data, one PCI device serves as the initiator (master, Initiator or Master), and another PCI device serves as the target (slave device, Target or Slave). All timing generation and control on the bus are initiated by the Master. The PCI bus can only allow one pair of devices to complete transmission at the same time, which requires an arbitration organization (Arbiter) to decide who has the right to take control of the bus.
The pins of the 32bit PCI system are divided into the following categories according to their functions:
System control: CLK, PCI clock, valid on the rising edge
RST, Reset Signal
Transmission control: FRAME#, marks the start and end of transmission
IRDY#, a sign that the Master can transmit data
DEVSEL#, when the Slave finds itself being Set low response when addressing
TRDY#, a sign that Slave can transfer data
STOP#, a signal that Slave actively stops transmitting data
IDSEL, plug-in The signal used to select the board when the system is started
Address and data bus: AD[31::0], address/data time-sharing multiplexing bus
C /BE#[3::0], command/byte enable signal
PAR, parity check signal
Arbitration number: REQ#, used by Master to request convergence Signal of bus usage rights
GNT#, Arbiter allows Master to obtain bus usage rights signal
Error report: PERR#, data parity error
SERR#, system parity check error
When the PCI bus operates, the initiator (Master) first sets REQ#, and when it gets permission from the arbiter (Arbiter) (GNT#), it will FRAME# is set low and the Slave address is placed on the AD bus. At the same time, C/BE# places a command signal to indicate the next transfer type. All devices on the PCI bus need to decode this address, and the selected device must set DEVSEL# to declare that it is selected. Then when both IRDY# and TRDY# are set low, data can be transmitted. Before the Master data transmission ends, set FRAME# high to indicate that only the last set of data is left to be transmitted, and release IRDY# after the data is transmitted to release bus control.
Here we can see that the transmission of the PCI bus is very efficient. After issuing a set of addresses, data can be sent continuously under ideal conditions, with a peak rate of 132MB/s. In fact, the currently popular 33M@32bit Northbridge chip can generally achieve 100MB/s continuous transmission.
2. Implementation of plug-and-play
The so-called plug-and-play means that when the board is inserted into the system, the system will automatically allocate the resources required by the board, such as Base address, interrupt number, etc., and automatically find the corresponding driver. Unlike the old ISA board, which requires complex manual configuration.
The actual implementation is far more complicated than it sounds. In the PCI board, there is a set of temporary registers called "Configuration Space", which is used to store base address and memory address, as well as interrupt and other information.
Take the memory address as an example. When powered on, the board reads a fixed value from the ROM and puts it into the temporary register. The corresponding memory location contains information such as the number of memory *** tuples that need to be allocated. The operating system must allocate memory based on this information, and fill the corresponding temporary register with the starting address of the memory after the allocation is successful. This eliminates the need to manually set switches to allocate memory or base addresses. The allocation of interrupts is similar.
3. Implementation of interrupt sharing
An important limitation of the ISA card is that interrupts are exclusive, and we know that the computer has only 16 interrupt numbers, and the system uses them all A few, so that there will be problems when there are multiple ISA cards that need to use interrupts.
The PCI bus interrupt service consists of two parts: hardware and software.
In terms of hardware, a level triggering method is used: the interrupt signal is connected high with a resistor on the system side, and the collector of the triode is used to pull the signal low on the board where the interrupt is to be generated. In this way, no matter how many boards generate interrupts, the interrupt signal will be low; and only when the interrupts of all boards have been processed, the interrupt signal will return to high level.
In terms of software, the interrupt chain method is used: assuming that when the system starts, it is found that board A uses interrupt 7, and the memory area corresponding to interrupt 7 will be pointed to the interrupt service program entry ISR_A corresponding to card A. ; Then the system finds that board B also uses interrupt 7. At this time, it points the memory area corresponding to interrupt 7 to ISR_B, and points the end of ISR_B to ISR_A. By analogy, a chain of interruptions will be formed. When an interrupt occurs, the system jumps to the memory corresponding to interrupt 7, which is ISR_B. ISR_B needs to check whether it is an interrupt from card B. If it is, handle it and release the pull-down circuit on the board; if not, call ISR_A. This completes the interrupted sharing.
Through the above discussion, it is not difficult to see that the PCI bus has great advantages. The market situation in recent years has also confirmed this. What does the PCI bus in a computer mean? What does PCI mean?
PCI: Peripheral Component Expansion Kit Interface What do P bus and K bus mean?
Extract relevant information Description: The S7400 modules are connected using busbars on the rack. The P bus (I/O bus) on the rack is used for high-speed exchange of I/O signals and high-speed access to signal modules. C bus (communication bus, or K bus) is used for high-speed communication data exchange between stations on the C bus. C and K are the abbreviations of the English word Communication and the German word Kommunikation (communication) respectively. After the two buses are separated, control and communication have their own data channels, and communication tasks will not affect the speed of control.
What does AHBLite bus mean
[AMBA AHB-Lite]
AHB-Lite
AHB: Advanced High-performance Bus
Used for high-performance and high-clock frequency systems. The most common use is to connect internal memeory device, external memory interface, and high bandwidth peripherals. Its basic components are: Master, Slave, Decoder, Multiplexor.
< p> In the address/control phase and data phase, there is a fixed pipeline.AHB: Only supports a subset of AMBA AXI protocol functions.
AHB-Lite: If Excluding the unnecessary parts in the development of master and slave IP, this subset of AHB protocol is defined as AHB-Lite. What does uss bus mean?
USS is also the identification code of the interstellar federation spacecraft, or The abbreviation of the Interstellar Federation. For example, the Enterprise number is USS NCC-1701.
Basic concepts of USS protocol
The USS protocol (Universal Serial Interface Protocol) is a universal communication protocol for all drive products of SIEMENS. It is a serial bus-based Data communication protocol. The USS protocol is a master-slave structure protocol, which stipulates that there can be one master station and up to 31 slave stations on the USS bus; each slave station on the bus has a station address (set in the slave station argument). The master station relies on it to identify each slave station; each slave station only responds to the report sent by the master station and sends back a message, and the slave stations cannot communicate directly with each other. In addition, there is a broadcast communication method. The master station can transmit messages to all slave stations at the same time. The slave stations do not need to send back messages after receiving the messages and making corresponding responses.
What does HT bus mean?
HyperTransport technology is a high-speed point-to-point bus technology. Each HyperTransport has two unidirectional point-to-point connections. It should be noted that HyperTransport is not patented by PC, it is also widely used in other fields. HyperTransport can provide an I/O operating frequency of 400MHz and a CPU-to-CPU operating frequency of 800MHz. This is called "double pumped". It actually transmits signals on the rising and falling edges of the clock at the same time. This is similar to the work of DDR memory. The principle is the same. An 8-bit I/O interface can provide a transfer rate of 800MB/s. Because HyperTransport has two unidirectional links, it can provide a bandwidth of 1.6GB/s. A 16-bit CPU-to-CPU link can provide 3.2GB/s bandwidth, and 6.4GB/s bidirectional bandwidth.
HyperTransport currently plays the role of transmitting data between the CPU and the motherboard chip (set) on the K8 platform. Many friends are not unfamiliar with this bus, but there are often quite a few misunderstandings. The most common thing is to confuse the HyperTransport frequency with the front-end bus frequency (FSB) and FSB.
For example, some K8 motherboard advertisements describe: "This motherboard supports FSB 1000MHz." In fact, on the K8 platform, the concept of FSB is already very vague: the front-end bus is the only channel for the CPU to communicate with the outside world. The processor must pass through it to obtain data and transmit calculation results to other corresponding devices, including the Northbridge chip and memory; on the K8 processor, the memory controller is integrated inside the CPU, so that the CPU does not need to pass through the original front-end bus. The row obtains data directly from the memory. In the Athlon64 CPU specification sheet released by AMD and the chipset schematics released by various chipset manufacturers, we cannot see the word front-end bus at all. What does CAN bus mean?
The CAN bus is one of the automotive network buses. The automotive bus also includes LIN, MOST, flaxray, CANFD, and the bus topology is usually based on the function of the bus information. It is divided into comfort (body) CAN and power CAN (chassis). What does PCI bus half-length card mean?
Look at it in two meanings:
1. PCI bus, that is, PCI bus, electrical characteristics, Baidu knows this .
2. Half-length card: This refers to the length and physical characteristics of the board, compared with the full-length card. Generally, when we say PCI cards, we refer to full-length cards, and half-length cards are mainly because There are certain situations where computers are used due to space constraints. The size of the half-length card is not exactly the same as that of the full-length card, but it is relatively smaller and takes up less space. PC bus ISA bus EISA bus What does PCI bus mean? What's the difference? The more detailed the better!
Bus is the general name for the data and control circuits connecting various components of the computer system.
ISA is a very old bus that supports up to 16 bits and has low data bandwidth; EISA is an enhancement of ISA and has improved data bandwidth. These two buses have been eliminated. PCI is the most widely used bus, supporting 32bit and 64bit data, and 33MHz to 66MHz. The data bandwidth is relatively high, but it is also relatively old and the latest, including PCI-E and so on. What does digital bus mean?
Any microprocessor must be connected to a certain number of components and peripheral devices, but if each component and each peripheral device uses a set of lines to communicate with the CPU Direct connection, then the connection will be complicated and even difficult to achieve. In order to simplify the hardware circuit design and system structure, a set of lines is commonly used, configured with appropriate interface circuits, and connected to various components and peripheral devices. This set of commonly used wiring lines is called a bus. The use of a busbar structure facilitates the expansion of components and devices. In particular, the establishment of a unified busbar standard makes it easy to interconnect different devices.
----The buses in microcomputers generally include internal buses, system buses and external buses. The internal bus is the bus between the peripheral chips and the processor inside the microcomputer, and is used for chip-level interconnection; while the system bus is the bus between the plug-in boards and the system board in the microcomputer, and is used for plug-in boards. First-level interconnection; the external bus is the bus between the microcomputer and external devices. As a device, the microcomputer exchanges information and data with other devices through the bus. It is used for device-level interconnection.
----In addition, in a broad sense, computer communication methods can be divided into parallel communication and serial communication, and the corresponding communication buses are called parallel buses and serial buses. Parallel communication is fast and has good real-time performance, but it occupies many interface lines and is not suitable for miniaturized products. Although the serial communication speed is low, it is simpler and more convenient in microprocessing circuits where the data communication throughput is not very large. ,flexible. Serial communication can generally be divided into asynchronous mode and synchronous mode.
----With the development of microelectronics technology and computer technology, bus technology is also constantly developing and improving, resulting in a wide variety of computer bus technologies, each with its own characteristics. Below, only the currently popular busbar technologies among various types of microcomputer busbars are introduced respectively.
1. Internal busbar
----1. I2C bus
----The I2C (Inter-IC) bus was launched by Philips more than 10 years ago. It is a new bus standard that has been widely used in the field of microelectronics communication control in recent years. It is a special form of synchronous communication. It has the advantages of fewer interface lines, simplified control methods, small device packaging, and high communication speed. In master-slave communication, multiple I2C bus devices can be connected to the I2C bus at the same time, and communication objects are identified by address.
----2． SPI bus
----Serial peripheral interface SPI (serial peripheral interface) bus technology is a synchronous serial interface launched by Motorola. The vast majority of MCUs (microcontrollers) produced by Motorola are equipped with SPI hardware interfaces, such as the 68 series MCUs. The SPI bus is a three-wire synchronous bus. Because of its strong hardware capabilities, the software related to SPI is quite simple, allowing the CPU to have more time to handle other matters.
----3. SCI bus
----Serial communication interface SCI (serial munication interface) is also launched by Motorola. It is a universal asynchronous communication interface UART, which is basically the same as the asynchronous communication function of MCS-51.
2. System bus
----1. ISA bus
----ISA (industrial standard architecture) bus standard is a system bus standard established by IBM in 1984 to launch PC/AT machines, so it is also called AT bus. It is an expansion kit for the XT bus to adapt to 8/16-bit data bus requirements. It was so widely used in the 80286 to 80486 era that there are still ISA bus slots in Pentium machines. The ISA bus has 98 pins.
----2. EISA bus
----EISA bus is a bus standard jointly launched by nine companies including Compaq in 1988. It uses a double-layer socket based on the ISA bus, and adds 98 signal lines to the original 98 signal lines of the ISA bus, that is, a new EISA signal line is added between the two ISA signal lines. In practice, the EISA bus is fully compatible with ISA bus signals.
----3. VESA bus
----VESA (video electronics standard association) bus is a regional bus jointly launched by 60 accessory card manufacturers in 1992, referred to as VL (VESA local bus ) bus. Its introduction laid the foundation for the innovation of microcomputer system bus architecture. This bus system takes into account the direct connection between the CPU and the main memory and Cache. This part of the bus is usually called the CPU bus or the main bus. Other devices are connected to the CPU bus through the VL bus, so the VL bus is called For regional bus lines. It defines a 32-bit data line, and can be expanded to 64-bit through the expansion kit slot. It uses a 33MHz clock frequency, a maximum transfer rate of 132MB/s, and can work synchronously with the CPU. It is a high-speed, efficient regional bus that supports 386SX, 386DX, 486SX, 486DX and Pentium microprocessors.
----4. PCI bus
----PCI (peripheral ponent interconnect) bus is one of the most popular buses currently. It is a regional bus launched by Intel Corporation. It defines a 32-bit data bus and can be expanded to 64-bit.
The PCI bus motherboard slot is smaller than the original ISA bus slot, and its functions are greatly improved compared to VESA and ISA. It supports burst read and write operations, with a maximum transfer rate of up to 132MB/s, and can support simultaneous Multiple sets of peripheral devices. The PCI regional bus is not compatible with existing ISA, EISA, and MCA (micro channel architecture) buses, but it is not restricted by the processor and is a bus developed based on new generation microprocessors such as Pentium.
----5. Compact PCI
----The system buses listed above are generally used in commercial PCs. Among computer system buses, there is another large category designed to adapt to the industrial field environment. Designed system buses, such as STD bus, VME bus, PC/104 bus, etc. Here we only introduce one of the popular busses for industrial computers - Compact PCI.
----Compact PCI means "solid PCI". It is the first PCI system to adopt the passive bus backplane structure. It is the electrical and software standard of PCI bus plus European card. The industrial assembly standard is the latest industrial computer standard today. Compact PCI is modified based on the original PCI bus. It uses the advantages of PCI to provide a high-performance core system that meets the application requirements of industrial environments. It also considers making full use of traditional bus products, such as ISA, STD, VME or PC/104 to expand the system's I/O and other functions.
3. External bus
----1. RS-232-C bus
----RS-232-C is a serial physical interface standard developed by the Electronic Industry Association (EIA). RS is the abbreviation of "Recommended Standard" in English, 232 is the identification number, and C represents the number of revisions. The RS-232-C bus standard has 25 signal lines, including a main channel and an auxiliary channel. In most cases, the main channel is mainly used. For general duplex communication, only a few signal lines can be achieved, such as A transmission line, a receiving line and a ground line. The data transmission rates specified by the RS-232-C standard are 50, 75, 100, 150, 300, 600, 1200, 2400, 4800, 9600, and 19200 baud per second. The RS-232-C standard stipulates that the driver is allowed to have a capacitive load of 2500pF, and the communication distance will be limited by this capacitance. For example, when using a 150pF/m communication cable, the maximum communication distance is 15m; if the capacitance per meter of the cable is reduced , the communication distance can be increased. Another reason for the short transmission distance is that RS-232 is a single-ended signal transmission, which has problems such as ground noise and the inability to suppress ***mode interference. Therefore, it is generally used for communications within 20m.
----2. RS-485 bus
---- When the communication distance is required to be tens of meters to thousands of meters, the RS-485 serial bus standard is widely used. RS-485 uses balanced transmission and differential reception, so it has the ability to suppress *** mode interference. In addition, the bus transceiver has high sensitivity and can detect voltages as low as 200mV, so the transmission signal can be recovered thousands of meters away. RS-485 uses half-duplex operation, and only one point is in the transmitting state at any time. Therefore, the transmission circuit must be controlled by the enable signal. RS-485 is very convenient for multi-point interconnection and can save many signal lines. RS-485 can be used to network to form a distributed system, which allows up to 32 drivers and 32 receivers to be connected in parallel.
----3. IEEE-488 bus
----The above two external buses are serial buses, while the IEEE-488 bus is a parallel bus interface standard. The IEEE-488 bus is used to connect systems. Devices such as microcomputers, digital voltmeters, digital displays, and other instruments can be assembled using the IEEE-488 bus.
It transmits signals in a bit-parallel, byte-sequential bidirectional asynchronous manner. The connection method is a bus method. Instrument devices are directly connected in parallel to the bus without the need for an intermediary unit, but up to 15 devices can be connected to the bus. The maximum transmission distance is 20 meters, the signal transmission speed is generally 500KB/s, and the maximum transmission speed is 1MB/s.
----4. USB bus
---Universal serial bus USB (universal serial bus) is developed by seven world-famous computer and communications companies including Intel, Compaq, Digital, IBM, Microsoft, NEC, and Northern Tele* **A new interface standard launched at the same time. It is based on universal connection technology to realize simple and fast connection of peripherals, achieving the purpose of user convenience, reducing costs and expanding the scope of PC connection peripherals of the kit. It can provide power for peripherals, unlike ordinary devices using serial and parallel ports that require a separate power supply system. In addition, speed is one of the outstanding features of USB technology. The maximum transmission rate of USB can reach 12Mbps, which is 100 times faster than the serial port and nearly 10 times faster than the parallel port. USB can also support multimedia