Go to hell. As shown in Figure 2, the input of SAR-ADC can be equivalent to a switch S 1 connected to a grounding capacitor CSH；;
Before voltage sampling, CSH is connected to power supply, voltage reference or ground through switch S2 for pre-charging, and the pre-charging voltage value is determined by the following formula.
Your own ADC circuit determines. At the beginning of voltage sampling, S2 is turned on and S 1 is turned off. When S 1 is closed, drive.
Dynamic circuits inject or draw charges from CSH, while ADC needs some time to sample the signal. During this sampling time, ADC needs to draw enough charge from the driving circuit to CSH, so that the system can reach the accuracy range of 1/2-LSB. In order to make the circuit you designed more accurate, you should add a resistor RIN and electricity between the operational amplifier and ADC.
Rong (pictured above). The function of CIN is to serve as a charge storage and provide enough power for the input of ADC.
RIN is used to avoid the direct connection between the operational amplifier and CIN, which makes the operational amplifier work more stably. RIN and CIN, right
At least meet the requirements of ADC sampling time. Finally, we need to choose the bandwidth that matches the RINCIN time constant.
Operational amplifier.
First of all, you need to charge the sampling capacitor CSH for a long time to make its voltage reach the sampling value.
Within 0.5LSB of the voltage. Theoretically, for 12 bit converter, the charging time should be more than 8 times RSW×CSH. examination
Considering the error tolerance and the change of device parameters, the charging time should be 10~ 15 times RSW×CSH. SAR ADC needs a gain.
It is an operational amplifier of 1V/V and an external resistor/capacitor pair of RIN and CIN. During sampling, ADC uses CIN to hold the signal.
Stability; Resistor RIN isolates the operational amplifier from the ADC load capacitance. Operational amplifiers isolate ADC from high impedance signal sources, which is also convenient.
Charge CIN and CSH quickly in the sampling stage.
To design such a seemingly simple circuit, the following methods should be followed. CIN must be silver mica.
Capacitance or C0G capacitance. These capacitors can provide stable voltage and frequency performance for CSH. There is electricity like X7R and Z5U.
The voltage and frequency "memory" effect of capacitor will reduce the total harmonic distortion of ADC. In addition, CIN should be 20 times larger than CSH. receive
Next, using the internal resistance of ADC, the capacitance determines RIN: the final CIN and RIN time constants are CSH and RSW.
70% of, RIN resistance is 50Ω.
It can also be stabilized to the expected accuracy in time when the signal jumps.
I can't upload the picture ~ if you need anything, call me. ...