Synchronous dynamic random access memory, synchronous dynamic random access memory. Synchronization means that the memory needs a synchronization clock, and the internal command transmission and data transmission are based on it. Dynamic means that the storage array needs to be constantly refreshed to ensure that data is not lost; Randomness means that data is not stored in linear order, but can be read and written at a freely specified address.
SDRAM has experienced four generations, namely, the first generation SDR SDRAM, the second generation DDR SDRAM, the third generation DDR2 SDRAM and the fourth generation DDR3 SDRAM.
DDR3 memory. It belongs to SDRAM series memory products, which provides higher operating efficiency and lower voltage than DDR2 SDRAM. It is the successor of DDR2 SDRAM (quadruple data rate synchronous dynamic random access memory), and it is also a popular memory product at present. In order to save more power and improve transmission efficiency, DDR3 SDRAM adopts SSTL 15 I/O interface, and the working I/O voltage is1.5V. It is packaged by CSP and FBGA. In addition to continuing the ODT, OCD, PASR and AL control modes of DDR2 SDRAM, it also adds more advanced CWD, reset and ZQ. CWD is used for writing delay, Reset provides the command of super power saving function, which can stop the operation of DDR3 SDRAM memory granularity circuit and enter the super power saving standby mode, and ZQ is a new terminal resistance calibration function. Add this line pin to provide ODCE (on-chip calibration Engline) to calibrate the internal interrupt resistance of ODT (on-chip terminal), and add SRT (self-refresh temperature) programmable temperature control storage clock function. With the addition of SRT, storage particles are optimized in temperature, clock and power management. It can be said that in the memory, the power management function is done, which greatly improves the stability of the memory particles and ensures that the memory particles will not be burned because of the high working clock. At the same time, DDR3 SDRAM also adds PASR(Partial Array Self-Refresh) local memory bank refresh function, which can be said to read and write the whole memory bank more effectively and achieve the effect of saving electricity.
2.
Double data rate double rate synchronous dynamic random access memory. Strictly speaking, DDR should be called DDR SDRAM, and people are used to calling it DDR. Among them, SDRAM is the abbreviation of synchronous dynamic random access memory, namely synchronous dynamic random access memory. DDR SDRAM is the abbreviation of double data rate SDRAM, which means double rate synchronous dynamic random access memory. DDR memory is developed on the basis of SDRAM memory and still uses SDRAM production system. Therefore, for memory manufacturers, DDR memory can be produced only by slightly improving the equipment for manufacturing ordinary SDRAM, which can effectively reduce the cost.
Compared with SDRAM, DDR adopts a more advanced synchronization circuit, which makes the main steps of specifying address and data transmission and output be executed independently and keep complete synchronization with CPU. DDR uses DLL (delay locked loop) technology. When the data is valid, the memory controller can use the data filter signal to accurately locate the data, output it every 16 times, and resynchronize the data from different memory modules. DDR can double the speed of SDRAM without increasing the clock frequency. It allows reading data on the rising and falling edges of clock pulses, so its speed is twice that of standard SDRAM. There is not much difference between DDR and SDRAM in appearance and volume. They have the same size and the same pin distance. However, DDR has 184 pins, which is 16 more than SDRAM, and mainly contains new signals such as control, clock, power supply and grounding. DDR memory adopts SSTL2 standard supporting 2.5V voltage instead of LVTTL standard supporting 3.3V voltage used by SDRAM.
This is also abbreviated as DDR, but it seems to have nothing to do with what you asked.
Demand Dial Routing (ddr) provides network connectivity by using the public telephone network. Generally speaking, most WANs are connected by private lines. A router is connected to a DCE device, such as a modem or ISDNTAS. They support synchronous V.25BITS protocol. You can set dial strings with scripts and dialer commands.
3.
RDRAM(RAMBUS DRAM) is a kind of memory developed by RAMBUS Company in America. Different from DDR and SDRAM, it adopts serial data transmission mode. At the time of launch, because the transmission mode of memory was completely changed, it could not be guaranteed to be compatible with the original manufacturing process, and the memory manufacturer had to pay a certain patent fee in Ghana to produce RDRAM, plus its own manufacturing cost, which caused ordinary users to be unable to accept its high price from the moment it came out. At the same time, DDR has gradually become the mainstream with low price and good performance. Although RDRAM is strongly supported by Intel, it has never become the mainstream. The data storage bit width of RDRAM is 16 bits, which is much lower than the 64 bits of DDR and SDRAM. But in terms of frequency, it is much higher than the two, reaching 400MHz or even higher. Similarly, data is transmitted twice in a clock cycle, and data can be transmitted once in the rising and falling periods of the clock. memory bandwidth can reach1.6 gbyte/s. The information in the ordinary DRAM line buffer will not be retained after being written back into the memory, while RDRAM has the characteristic of continuing to retain this information, so when accessing the memory, if there is target data in the line buffer, it can be used, thus realizing high-speed access. In addition, it can collect data and transmit it in the form of data packets, so as long as 24 clocks are used at the beginning, 1 byte can be read every 1 clock in the future. The length of data that can be read in one visit can reach 256 bytes.