What is antagonistic patent layout?

That is, providing patent chips to resist patent attacks initiated by major competitors in the market, forming a certain patent counterattack force in individual fields, and eliminating the threat of competitors to enterprises as much as possible.

In view of antagonistic patent layout, enterprises can rely on their own advantages, according to competitors' R&D priorities and patent layout, and find patent deployment points in market segments and sub-industries that can contain and threaten each other's product development and even occupy a leading position. For example, setting patent barriers in the weak points of competitors' patent layout or in the main improvement direction of products. For example, around competitors' core patents, we apply for a large number of peripheral patents from different technical schemes, effects and applications, and set patent barriers for competitors' effective commercial applications around competitors' core patents.