Generally, serial data communication can be divided into clock and data, asynchronous and synchronous.
There are single wire, double wire and three wire, etc.
I2C is definitely 2-wire (not counting the ground wire).
I2C protocol is really scientific, better than 3/4-wire SPI, and of course the multi-wire communication rate is relatively fast.
I2C. ! !
otherwise, the SDA jump will be "penalized" as "start signal S", and the SDA jump will be "penalized" as "stop signal P".
When SCL= (low level), SDA will just fool around! ! ! (Don't go too far to jump on SCL)
After each byte, the other party should send back a reply signal ACK as a sign that the other party is online.
Generally, the non-reply signal is after the last byte of all bytes. Generally, it should be signed by both parties.
SCL must be sent by the host, otherwise the world will be in chaos.
The first byte is "chip selection signal", that is, the 7-bit slave address plus 1-bit direction (reading and writing) ! ! ) indicates that you are online.
Slaves with other addresses are not allowed to fool! ! ! (Of course, group calling can be fooled, but only listening is forbidden.)
Reading and writing are defined from the standpoint of the host.
"Reading" means that the host receives data from the slave, and "Writing" means that the host sends data to the slave.
Repetition bits are mainly used for the "signal" of the host to switch from the sending mode to the receiving mode. Since there are only two wires,
the sending and receiving conversion is definitely more complicated than SPI, because SPI is available. But I2C can't.
At each stage of hardware I2C module, especially MCU/ARM/DSP, an accurate status code can be obtained.
According to this status code, it is easy to know what status and error information are now.
The 7-bit I2C bus can hook up 127 I2C devices with different addresses. No. "device" is used as the group call address.
More 1-bit I2C devices can be connected to the 1-bit I2C bus.
In short, it is generally easy to control as long as you master the I2C cheat ... The first byte (slave address) consists of 7-bit address and 1 R/W read-write bit, which is a device address.
first of all, you should know that the device address of the common IIC interface universal device is composed of the type and model, and the addressing code, with ***7 digits.
the format is as follows:
D7 D6 D5 D4 D3 D2 D1 D
1- The device type is determined by: D7-D4 ***4 bits. This type was fixed when it was produced by the semi-conductor company, which means that these four bits are fixed.
2- User-defined address code: D3-D1***3 digits. This is set by the user himself. Usually, devices such as EEPROM are determined by the combined level of three pins of external IC (with common names such as A, A1 and A2). This is also the addressing code.
so why the same type of IC on the same IIC bus can only hang up to 8 chips of the same kind.
3- the lowest bit is the R/W bit. I don't need to say more about this one.
in modern electronic systems, there are a large number of ics that need to communicate with each other and with the outside world. In order to improve hardware efficiency and simplify circuit design, PHILIPS developed a simple bidirectional two-wire serial bus I2C for internal IC control. I2C bus supports any IC manufacturing process, and PHILIPS and other manufacturers provide a wide variety of I2C compatible chips. As a patented control bus, I2C has become a worldwide industrial standard.
each device has a unique address, and it can be a single-receiving device (such as LCD driver) or a device that can receive or transmit (such as memory). The transmitter or receiver can operate in master mode or slave mode, depending on whether the chip has to start data transmission or just be addressed. I2C is a multi-master bus, that is, it can be controlled by multiple connected devices.
the basic I2C bus specification was released 2 years ago, and its data transmission rate is up to 1Kbits/s, with 7-bit addressing. However, due to the rapid increase of data transmission rate and application function, I2C bus has also been enhanced to fast mode (4Kbits/s) and 1-bit addressing to meet the requirements of higher speed and larger addressing space.
I2C bus always keeps pace with advanced technology, but still maintains its downward compatibility. And recently, a high-speed mode has been added, and its speed can reach 3.4 mbits/s. It enables I2C bus to support existing and future high-speed serial transmission applications, such as EEPROM and Flash memory. In modern electronic systems, there are a large number of ICs that need to communicate with each other and with the outside world. In order to improve hardware efficiency and simplify circuit design, PHILIPS developed a simple bidirectional two-wire serial bus I2C for internal IC control. I2C bus supports any IC manufacturing process, and PHILIPS and other manufacturers provide a wide variety of I2C compatible chips. As a patented control bus, I2C has become a worldwide industrial standard.
each device has a unique address, and it can be a single-receiving device (such as LCD driver) or a device that can receive or transmit (such as memory). The transmitter or receiver can operate in master mode or slave mode, depending on whether the chip has to start data transmission or just be addressed. I2C is a multi-master bus, that is, it can be controlled by multiple connected devices.
the basic I2C bus specification was released 2 years ago, and its data transmission rate is up to 1Kbits/s, with 7-bit addressing. However, due to the rapid increase of data transmission rate and application function, I2C bus has also been enhanced to fast mode (4Kbits/s) and 1-bit addressing to meet the requirements of higher speed and larger addressing space.
I2C bus always keeps pace with advanced technology, but still maintains its downward compatibility. And recently, a high-speed mode has been added, and its speed can reach 3.4 mbits/s. It enables I2C bus to support existing and future high-speed serial transmission applications, such as EEPROM and Flash memory.