1
In the past, IC design process was a feasible design method or "process" composed of a set of single-point design tools by using various software scripts and translating various data formats. This method has been used for a long time-sometimes even by software tool suppliers for their own tool concentration-to gather "fragmented" application software majors, and it is impossible to establish a more efficient design "process" with various tools operating independently. According to users, compared with the cost of commercial EDA software tools, the integration of design tools needs 2 to 4 dollars (or more). In the era of discontinuous wafer technology, a similar principle can be found in semiconductor manufacturing-usually defined by hardware tools themselves-to move wafers from one machine to another by hand. Finally, customers who need and implement machine interface standards, automated wafer processing and factory automation software can enjoy great efficiency advantages. The supply chain of the equipment industry gathers together to formulate standards, and every supplier, wafer factory and customer has benefited a lot from this cooperation.
There are many standards that help to realize the multi-tool design process, but there are not enough standards to provide the infrastructure for smooth interoperability. The organization that calls itself the Interoperability PDK Library (IPL) Alliance is an excellent example of establishing a customized open environment for IC design.
When the founding members of IPL Alliance AWR, Ciranova, Silicon Navigator, SpringSoft and Synopsys? At the first meeting, the first task was to adopt the EDA database open access (OA) standard of Silicon Integration Alliance (Si2). In the past, EDA company developed patent database for the convenience of product development, and also because it felt that its own exclusive version provided its own competitive advantage. The access of external suppliers to these patent databases is limited to specific value-added third-party tools, and usually requires complex data conversion to transfer data between tools. Because innovation usually starts from a small place, companies that acquire technology through mergers or acquisitions often find that many of their tools do not use the same database. Of course, customers who try to use tools from different suppliers to establish the best design process at the same level will face complex challenges; Even if customers try to integrate commercial tools with their own proprietary tools, they will encounter even worse problems.
2 Open Database Challenge
In 200 1 year, after other efforts failed for decades, Si2 organized another committee to define and develop the open EDA database standard. A few years later, OpenAccess (OA) database appeared on SI2, and the interoperability between EDA tools finally appeared. Aside from the previous competition, any Si2 member can now use OA and quickly become a standard EDA database, at least in terms of customization and simulation design. At present, there are about 34 OA alliance members, representing EDA companies and many large customers who account for 80% of all EDA revenue. The number of OA alliance members is an ironclad proof of the value of cooperation for design success. Although adopting OA standard is a good start, it is still not enough. The birth of an open database, such as an open operating system (such as Linux), does not necessarily mean that the ideal of an open design environment has been realized. Of course, the widespread adoption of OA will be regarded as a milestone in establishing a fully interoperable environment, but although OpenAccess database provides an important infrastructure for design-side standards, its widespread adoption still depends on some key functional requirements, some of which are the goals of IPL alliance.
3 Interoperability Fab Design Kit
One of these requirements is the PCell link library, which is a key part of every fab Physical Design Suite (PDK). PCells is a "parameterized" unit, which is used to design analog and customized digital circuits instead of many fixed units and specified dimensional variables (parameters) with different values. For example, a single PCell of an NMOS transistor can replace an almost infinite number of device sizes just by changing the gate length parameter of a specific location or "process". In addition, there are advanced functions about PCells, which can provide formulas or functions to replace some variables and maintain the necessary relationships. Even some PCells can automatically adapt to the input of simulation and get appropriate values according to specific conditions. Before all the main components, link libraries and functions can interoperate, the value of open database will be limited, especially for analog and custom digital design.
Analog circuits are designed in circuit diagram format, and the symbols used correspond to specific devices with specified values. Now, layout engineers know that advanced layout tools can automatically generate the DRC-correct)PCell layout design of PC units, and even combine many devices to achieve space efficiency without having to "hand-draw" any graphics. The connection between the designated unit and the router in the circuit diagram provides a variety of options for manual or automatic correct wiring in the layout tool environment. Almost all advanced layout tools have a PCell mechanism running in this form. The problem is that most PCells currently used have been written in the proprietary language of a single vendor. It is a tedious and arduous task for fabs, customers and EDA suppliers to provide other suppliers with PCells written in other languages and ensure that they are exactly the same as the original version. Customers are usually limited by economic factors, so they can only use the tools supported by the fab PDK, and can't take into account their own preferences. In Figure 2, customers who cooperate with three fabs and use tools from three EDA suppliers may need as many as nine pdk to meet the needs of different process technologies. With open standards, it can be reduced to three pdk, and with advanced tools, users can even share a single PCell link library.
4 work together
Based on the above reasons, the founding members of IPL Alliance work together to complete the remaining infrastructure and actively assist in the realization of OA. Members who have participated in many corporate collaborations know that many of these activities have failed, and the most common results are PowerPoint slides and a lot of promises. In this way, IPL alliance was initiated by five major companies, and now it has the support of nearly 20 other manufacturers, and it has been running at a rapid pace. The aforementioned sample PCell link library was released in April 2007; At the Design Automation Conference (DAC) in 2008, the interoperability of multiple vendors and tools has been demonstrated. In July 2009, TSMC announced that the industry's first interoperable PDK (iPDK) began to supply, including related 65nm analog and RF PCell link libraries; In February this year, IPL released the IPL 1.0 standard, including reference design and PCell link library, so that every company can benefit from the same technology.
This informal IPL group without any financial resources can solve the biggest dispute in such a short time, which shows that the era of cooperation has arrived. The interests of * * * and * * * are the driving force for the success of cooperation, and the result of IPL alliance proves the expected benefits. For the first time in the history of semiconductor industry, IC designers can use the same PCell link library for almost any OA-based tools, including those developed internally. In many cases, following the IPL standard, advanced functions can be used easily, and customers can realize their dream of "carrying" PCells between many factories or fabs-at least in the specific technical process.
5 kinds of tools are closely matched
In the autumn of 2007, at the Si2 OpenAccess conference, a supplier's tool used standard symbols (also from Si2) to create a circuit diagram stored in OA, which was opened by other suppliers' tools, modified and then transmitted to the tools of third-party suppliers. The changes were still obvious and the links were still complete. According to the circuit diagram, the layout established by IPL interoperable PCell link library was opened by a tool. In this tool, some PCell parameters were changed, and some nodes were connected to prove the effective connection. At the same time, the Design Rule (DRC) was deliberately violated. DRCs is implemented by other vendors' tools, and error labels are also displayed in the layout by other vendors' tools. Using layout tools to correct mistakes, adding more wiring, and then using other tools from other vendors to implement DRCs shows that the layout does not violate the rules now. The raw data from OA does not need to be translated into other formats at all, such as GDSII.
Why is this an outstanding achievement? After all, this is the way all customers expect to work! In fact, it is a natural reason that many semiconductor manufacturers continue to use EDA tools developed internally. In the computer world, customers expect hardware and software to cooperate seamlessly, use mutually agreed communication protocols on a smooth network, and have standard plug-ins and terminals. In order to be accepted by the market, suppliers' tools must be able to operate smoothly with each other. Suppliers who violate the standards must bear their own risks, and when more compatible solutions enter the market, they will be eliminated. This is the competitive advantage of interoperability because it meets the expectations of all customers. So why is EDA different?
This exhibition was a great achievement in 2007, and the number of IDMs members, fabs and fabless design teams using the same PCell link library in multi-vendor tools increased rapidly. For the first time in history, customers can benefit from the best design tools at the same level and know that fab-certified design suites can run smoothly in their own design processes.
6 abstract
When it is implemented on OA database, open PCells and open PCells functions make innovative EDA novices and top EDA suppliers in an equal competitive position. In addition to the cost and spirit of developing databases, the barriers of interoperability have also been removed, and new ideas and products will spring up like mushrooms after rain. Many EDA novices and veterans are trying to improve the level of simulation automation and overall design productivity. A fair competitive position will encourage aboveboard enterprises, university researchers and others to establish and realize new ideas.
At the same time, contemporary products must evolve to survive. The lack of competition in the design chain will only benefit market leaders for no reason. Manufacturers who jointly develop and open PDK believe that competition can improve their products. Just like competitors, they are obliged to innovate and cooperate to keep pace with customer demand. More and more customers are demanding interoperability. Failure to cooperate is tantamount to giving the advantage to competitors who are willing to cooperate to improve.
The design side supply chain and other parts of the semiconductor supply chain are not elegant. "What we did before" is absolutely not enough, and cooperation is king. Groups such as IPL Alliance have proved that when there is enough motivation, concrete and significant results can indeed be achieved. People will work together to create miracles.
Brief introduction of the author
Richard Morse is the EDA Alliance and Technical Marketing Manager of SpringSoft.