Riscv patent risk

20 19 10 3 1, SiFive announced a milestone of IP products, because they showed their first disordered CPU micro-architecture, promised to achieve a significant performance leap on the existing RISC-V kernel, and provided PPA indicators that competed with Arm products.

Speaking of SiFive, it's actually quite interesting. SiFive China was founded in August last year. Unlike other multinational companies, SiFive China is an independent company, operating independently in China, not a subsidiary of SiFive. It has its own board of directors and management team. In the future, it can independently accept investments, including those from China. But it also has something to do with SiFive, such as providing IP and other technologies.

SiFive released U54 series on 20 17, which is the first mature CPU IP that can run a complete operating system (such as Linux).

Back to the topic, what is the world's first RISC-V processor CPU? Why is RISC-V architecture so sought after?

A brand-new RISC-VOOO CPU: U8 comes out.

So far, if we want to design a new CPU based on the new ISA, it is not surprising that we should start small, then iterate, and then continue to increase the complexity of the design. SiFive's U5 and U7 series are relatively simple in CPU microarchitecture. Compared with the low-end and microcontroller core of Arm, they can provide some very cost-effective options and alternatives, but in fact they can't meet the tasks with more complex workloads and higher performance requirements.

However, the performance of the new U8 series is five to four times higher than that of U54 and U74 by greatly improving the new micro-architecture, which is extremely rare in our industry.

SiFive's design goal for U8 series is also very simple: directly benchmark Arm Cortex-A72, the goal of U8 series is similar in performance, providing 1.5 times the high efficiency, while the area is only half that of its competitors. Of course, compared with A72, it still means "bullying" the old products, but SiFive's PPA target is relatively high, which means U8 should be more competitive than the latest generation of Arm kernel.

What is the charm of RISC-V?

As the name implies, RISC-V is the fifth version of RISC. RISC, or "Reduced Instruction Set Computer", is the great contribution of Turing Prize winners John L Hennessy and David A Patterson to the industry. Published by University of California, Berkeley at 1980. Chip instruction set helps computer software communicate with the underlying hardware devices, and is the basic component of a computer.

Let's take a look at the world's attitude towards RISC-V:

Western Digital, the world's largest hard disk manufacturer, will promote RISC-V with an annual forecast of 654.38+0 billion to 2 billion, and gradually complete the migration of all products to RISC-V customized architecture;

MicroSemi provides AI solution based on Risc-V+Linux+CNN accelerator;

The Indian government strongly funded the processor project based on RISC-V, making RISC-V the de facto national instruction set in India.

The membership of RISC-V Foundation has increased to over 150. Universities, research institutes and enterprises use or evaluate RISC-V-based applications in a large number, with high participation and wide coverage.

The ecological chain of instruction set architecture has been continuously developed and improved, and key breakthroughs have been made in tool chain and RTOS/Linux operating system transplantation.

Whether it is the flexibility of modular instruction set, getting rid of the historical burden of backward compatibility, getting rid of more than 40 basic instructions, and using BSD licensing open source protocol, RISC-V has various advantages, just like a spring breeze in complex instruction set.

As early as last year, many companies began to mass-produce chips based on RISC-V, such as Jian 'an Yunzhi and Huami in China, who made RISC-V chips earlier. At that time, people in the industry also predicted that many other companies making RISC-V chips might officially launch chips based on RISC-V in 20 19 or 2020.

Therefore, Zhao Yi innovation brought GD32V series development board.

GD32V series is coming.

Recently, Zhao Yi Innovation, a leading semiconductor supplier in the industry, officially launched the world's first GD32V series 32-bit universal MCU product based on RISC-V kernel, providing a complete tool chain and continuously building the RISC-V development ecology.

GD32VF 103 series MCU adopts a brand-new bumblebee processor core based on RISC-V, which is a commercial RISC-V processor core independently developed by Zhao Yi Innovation and China Lessing Technology for ultra-low power consumption scenarios such as the Internet of Things.

GD32VF 103 series RISC-V mCU provides the working frequency of 108MHz, as well as on-chip flash memory from 16KB to 128KB and SRAM cache from 6KB to 32KB. GFlash patented technology supports high-speed fog waiting for the kernel to access flash memory. Bumblebee kernel also has built-in one-cycle hardware multiplier, hardware divider and acceleration unit to meet the challenges of advanced operation and data processing.

GD32V series new products all meet the industrial high reliability and temperature standards, providing continuous supply guarantee for at least ten years. The electrostatic protection (ESD) protection level of the chip can reach 5KV in the human body discharge (HBM) mode and 2KV in the device discharge (CDM) mode, which is far higher than the industry safety standards, so it is suitable for complex environments and makes the terminal products more reliable and durable.

The brand-new GD32VF 103 series RISC-V MCU will be listed soon. Li Chuang Mall is now on sale simultaneously.