What is the principle of INTEL PAE physical address extension?

Page Address Extension (PAE) technology was originally introduced to make up for the shortage of 32-bit addresses in PC server applications. As we know, the traditional IA32 architecture only has a 32-bit address bus, which only allows the system to accommodate less than 4GB of memory. Such a large memory should be enough for ordinary desktop applications. But for server applications, it is not enough, because the server may carry many applications running at the same time.

PAE technology expands the address to 36 bits, so that the system can accommodate 2 36 = 64 GB of memory. At the same time, PAE technology is also put forward to solve the limitation that large physical pages in PSE technology must be 4MB. From the previous discussion, we know that although PSE and PSE-36 technologies meet the needs of some applications for large memory pages, the jump from 4KB to 4MB is too big, and the existing operating systems and applications will inevitably lead to serious internal page fragmentation, thus wasting memory.

PAE technology is implemented in Pentium Pro and later CPU, and AMD also popularized this technology in Athlon and later CPU.