The purpose of the slide is to find the problems in the chip and make improvements. The success of tape-out means that the test chip can be mass-produced, while the failure of tape-out may lead to financial losses, layoffs in R&D departments and even company closure. In the process of chip manufacturing, there are generally two periods that can be called streaming. In the mass production of chips, assembly line production is one of them.
When designing, I found that some places can be modified to achieve better results, but I am afraid that such modification will bring unexpected consequences to the chip. If chips are manufactured on a large scale according to such a problematic design, the losses will be great. Therefore, in order to test whether the integrated circuit design is successful, it is necessary to make chips.
That is, from the circuit diagram to the chip, check whether each process step is feasible. Check whether the circuit has correct performance and function. If the wafer is successful, the chip can be manufactured on a large scale, otherwise, it is necessary to find out the reason and optimize the design accordingly.
Domestic chip flow factories:
1, SMIC: undisputed domestic chip foundry leader, ranking first in technology and scale in China. The advanced process of 14 nm has been mass-produced, and the N+ 1 process is being introduced, from 7 to 14nm, which is equivalent to the 7nm N+2 process being developed.
2. Hua Hong Group: The Group owns subsidiaries such as Shanghai Hua Hong Li Hong, Shanghai Huali Microelectronics, Shanghai Integrated Circuit R&D Center, Hua Hong Jineng, Hongri International, Hua Hong Semiconductor, Hua Hong Science and Technology, and Hua Hong Confidence. With three 8-inch production lines and three 12-inch production lines, the group is the only national integrated circuit R&D center.
3.Xi 'an Institute of Microelectronics Technology (Aerospace 77 1 Institute): affiliated to the Ninth Research Institute of Aerospace Science and Technology Group, it mainly produces chips for aerospace military enterprises. This chip technology does not need to be very advanced, but it requires extremely high reliability. There are few published materials, and its technological level should not exceed 28nm.